ECE 2020 Digital Design

Last time

• Last time
  • We showed how to implement a general expression in CMOS logic
  • To facilitate the design of more complex functions, we introduced the notion of gates
  • Gates abstract the CMOS circuit
  • There is still leeway in the design because several implementations are possible
• To be effectively prepared for today you should have:
  • Read your notes
• Important notes
  • Homework 3 dues on Wednesday October 08, 2025 11:59pm
  • Lab 1 deferred to Wednesday October 01, 2025 in class (need mixed logic)
  • Breanna's office hours Thursdays 2-3pm in TSRB 530
  • Dr. Bloch office hours Wednesday 8:30am-9:30am (to be confirmed)
• Today
  • Logic gates
  • Mixed logic
• Be ready!
  • I expect you to take notes
  • Take your quizz at 10:15am

AND gate

OR gate

Buffer gate

XOR gate

NAND gate

NOR gate

NOT gate

• This can be implemented with an inverter

• This can also be implemented with a NAND or NOR gate

XNOR gate

Equivalent gates

Mixed logic

• Mixed logic is a gate design methodology
  • separate functional description from physical implementation
  • implementation should not prevent you from figuring out what the circuit does

Until next time

• To be effectively prepared for Wednesday October 8, 2025, you should:
  • Read your notes and review the examples
  • Start working on Homework 3
  • Start working on your pre-lab
  • Enjoy your Fall break